Searched refs:membaseconfig0 (Results 1 - 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-exynos/
H A Dclock_init.h123 unsigned membaseconfig0; member in struct:mem_timings
H A Ddmc_init_ddr3.c112 writel(mem->membaseconfig0, &dmc->membaseconfig0);
578 writel(val, &tzasc0->membaseconfig0);
579 writel(val, &tzasc1->membaseconfig0);
H A Dclock_init_exynos5.c350 .membaseconfig0 = DMC_MEMBASECONFIG_VAL(0x40),
453 .membaseconfig0 = DMC_MEMBASECONFIG_VAL(0x40),
/u-boot/arch/arm/mach-exynos/include/mach/
H A Ddmc.h174 unsigned int membaseconfig0; member in struct:exynos5_dmc
424 unsigned int membaseconfig0; member in struct:exynos5420_tzasc

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