Searched refs:l2actlr (Results 1 - 3 of 3) sorted by relevance
| /u-boot/arch/arm/cpu/armv7/ |
| H A D | cp15.c | 17 void __weak v7_arch_cp15_set_l2aux_ctrl(u32 l2actlr, u32 cpu_midr, argument
21 asm volatile ("mcr p15, 1, %0, c15, c0, 0\n\t" : : "r"(l2actlr));
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| H A D | start.S | 300 isb @ Recommended ISB after l2actlr update
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| /u-boot/arch/arm/mach-omap2/omap5/ |
| H A D | hwinit.c | 325 u32 l2actlr; local
327 asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r"(l2actlr));
334 l2actlr |= 0x118;
335 omap_smc1(OMAP5_SERVICE_L2ACTLR_SET, l2actlr);
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