Searched refs:irq (Results 1 - 25 of 133) sorted by relevance

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/u-boot/arch/x86/lib/
H A Dinterrupts.c49 void irq_install_handler(int irq, interrupt_handler_t *handler, void *arg) argument
53 if (irq < 0 || irq >= SYS_NUM_IRQS) {
54 printf("irq_install_handler: bad irq number %d\n", irq);
58 if (irq_handlers[irq].handler != NULL)
61 (ulong) irq_handlers[irq].handler);
65 irq_handlers[irq].handler = handler;
66 irq_handlers[irq].arg = arg;
67 irq_handlers[irq]
78 irq_free_handler(int irq) argument
103 int irq = hw_irq - 0x20; local
135 int irq; local
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H A Dpirq_routing.c21 u8 irq = 0; local
30 irq = i;
33 if (irq_already_routed[irq])
37 if (pirq_check_irq_routed(dev, link, irq)) {
38 irq_already_routed[irq] = true;
44 if (!irq_already_routed[irq]) {
45 irq_already_routed[irq] = true;
53 return irq;
56 void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num) argument
69 irq
74 int irq = 0; local
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H A Di8259.c67 void mask_irq(int irq) argument
71 if (irq >= SYS_NUM_IRQS)
74 if (irq > 7)
79 outb(inb(imr_port) | (1 << (irq & 7)), imr_port);
82 void unmask_irq(int irq) argument
86 if (irq >= SYS_NUM_IRQS)
89 if (irq > 7)
94 outb(inb(imr_port) & ~(1 << (irq & 7)), imr_port);
97 void specific_eoi(int irq) argument
99 if (irq >
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/u-boot/include/
H A Dirq.h26 * struct irq - A single irq line handled by an interrupt controller
28 * @dev: IRQ device that handles this irq
29 * @id: ID to identify this irq with the device
32 struct irq { struct
57 * @irq: Interrupt number to set
59 * @return 0 if OK, -EINVAL if @irq is invalid
61 int (*set_polarity)(struct udevice *dev, uint irq, bool active_low);
84 * @irq: IRQ line
88 int (*read_and_clear)(struct irq *ir
152 irq_is_valid(const struct irq *irq) argument
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/u-boot/drivers/misc/
H A Dirq-uclass.c12 #include <irq.h>
26 int irq_set_polarity(struct udevice *dev, uint irq, bool active_low) argument
33 return ops->set_polarity(dev, irq, active_low);
56 int irq_read_and_clear(struct irq *irq) argument
58 const struct irq_ops *ops = irq_get_ops(irq->dev);
63 return ops->read_and_clear(irq);
68 struct irq *irq)
72 ret = device_get_by_ofplat_idx(cells->idx, &irq
67 irq_get_by_phandle(struct udevice *dev, const struct phandle_2_arg *cells, struct irq *irq) argument
86 irq_of_xlate_default(struct irq *irq, struct ofnode_phandle_args *args) argument
104 irq_get_by_index_tail(int ret, ofnode node, struct ofnode_phandle_args *args, const char *list_name, int index, struct irq *irq) argument
143 irq_get_by_index(struct udevice *dev, int index, struct irq *irq) argument
156 irq_request(struct udevice *dev, struct irq *irq) argument
183 irq_get_acpi(const struct irq *irq, struct acpi_irq *acpi_irq) argument
198 UCLASS_DRIVER(irq) = { variable
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H A Dirq_sandbox.c10 #include <irq.h>
12 #include <asm/irq.h>
15 static int sandbox_set_polarity(struct udevice *dev, uint irq, bool active_low) argument
17 if (irq > 10)
41 static int sandbox_irq_read_and_clear(struct irq *irq) argument
43 struct sandbox_irq_priv *priv = dev_get_priv(irq->dev);
45 if (irq->id != SANDBOX_IRQN_PEND)
59 static int sandbox_irq_of_xlate(struct irq *irq, argument
67 sandbox_get_acpi(const struct irq *irq, struct acpi_irq *acpi_irq) argument
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H A Dirq_sandbox_test.c10 #include <irq.h>
11 #include <asm/irq.h>
14 { .compatible = "sandbox,irq-test" },
/u-boot/arch/sandbox/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Dapple-aic.h5 #include <dt-bindings/interrupt-controller/irq.h>
/u-boot/arch/x86/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Dapple-aic.h5 #include <dt-bindings/interrupt-controller/irq.h>
/u-boot/arch/xtensa/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
/u-boot/arch/nios2/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Dapple-aic.h5 #include <dt-bindings/interrupt-controller/irq.h>
/u-boot/arch/microblaze/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Dapple-aic.h5 #include <dt-bindings/interrupt-controller/irq.h>
/u-boot/arch/mips/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Dapple-aic.h5 #include <dt-bindings/interrupt-controller/irq.h>
/u-boot/arch/arm/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Dapple-aic.h5 #include <dt-bindings/interrupt-controller/irq.h>
/u-boot/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Dapple-aic.h5 #include <dt-bindings/interrupt-controller/irq.h>
/u-boot/dts/upstream/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h5 #include <dt-bindings/interrupt-controller/irq.h>
/u-boot/arch/x86/cpu/
H A Dacpi_gpe.c11 #include <irq.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/interrupt-controller/x86-irq.h>
29 static int acpi_gpe_read_and_clear(struct irq *irq) argument
31 struct acpi_gpe_priv *priv = dev_get_priv(irq->dev);
37 bank = irq->id / 32;
38 mask = 1 << (irq->id % 32);
67 static int acpi_gpe_of_xlate(struct irq *irq, struc argument
76 acpi_gpe_get_acpi(const struct irq *irq, struct acpi_irq *acpi_irq) argument
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/u-boot/test/dm/
H A Dirq.c3 * Test for irq uclass
10 #include <irq.h>
16 /* Base test of the irq uclass */
51 struct irq irq; local
53 ut_assertok(irq_first_device_type(SANDBOX_IRQT_BASE, &irq.dev));
54 irq.id = SANDBOX_IRQN_PEND;
55 ut_asserteq(0, irq_read_and_clear(&irq));
56 ut_asserteq(0, irq_read_and_clear(&irq));
57 ut_asserteq(0, irq_read_and_clear(&irq));
69 struct irq irq; local
85 struct irq irq; local
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