Searched refs:insn (Results 1 - 9 of 9) sorted by relevance
/u-boot/arch/xtensa/include/asm/ |
H A D | cacheasm.h | 39 .macro __loop_cache_all ar at insn size line_width 45 \insn \ar, 0 << (\line_width) 46 \insn \ar, 1 << (\line_width) 47 \insn \ar, 2 << (\line_width) 48 \insn \ar, 3 << (\line_width) 55 .macro __loop_cache_range ar as at insn line_width 61 \insn \ar, 0 67 .macro __loop_cache_page ar at insn line_width 71 \insn \ar, 0 << (\line_width) 72 \insn \a [all...] |
H A D | ldscript.h | 193 .xt.insn 0 : \ 195 KEEP (*(.xt.insn)) \
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/u-boot/arch/powerpc/lib/ |
H A D | extable.c | 26 unsigned long insn, fixup; member in struct:exception_table_entry 39 diff = first->insn - value;
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/u-boot/arch/arm/lib/ |
H A D | interrupts_64.c | 115 u16 *insn = (u16 *)ALIGN_DOWN(regs->elr, 2); local 117 if (*insn != SMH_T32_SVC && *insn != SMH_T32_HLT) 121 u32 *insn = (u32 *)ALIGN_DOWN(regs->elr, 4); local 123 if (*insn != SMH_A32_SVC && *insn != SMH_A32_HLT) 128 u32 *insn = (u32 *)ALIGN_DOWN(regs->elr, 4); local 130 if (*insn != SMH_A64_HLT)
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H A D | interrupts.c | 146 u16 *insn = (u16 *)(regs->ARM_pc - 2); local 148 if (*insn != SMH_T32_SVC) 151 u32 *insn = (u32 *)(regs->ARM_pc - 4); local 153 if (*insn != SMH_A32_SVC)
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/u-boot/arch/arm/include/asm/ |
H A D | processor.h | 58 union debug_insn insn; member in struct:debug_entry
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/u-boot/arch/mips/include/asm/ |
H A D | asm.h | 24 .insn 37 .insn 50 .insn 73 symbol: .insn
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H A D | mipsregs.h | 1126 static inline int mm_insn_16bit(u16 insn) argument 1128 u16 opcode = (insn >> 10) & 0x7; 1138 ".insn\n\t" \ 1141 ".insn\n\t" \ 1146 ".insn\n\t" \ 1175 * ".insn\n\t"
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/u-boot/arch/sh/lib/ |
H A D | movmem.S | 51 movmem_done: ! share slot insn, works out aligned.
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