Searched refs:id (Results 1 - 25 of 2237) sorted by relevance

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/u-boot/dts/upstream/include/dt-bindings/nvmem/
H A Dmicrochip,sama7g5-otpc.h10 #define OTP_PKT(id) ((id) * 4)
/u-boot/dts/upstream/include/dt-bindings/memory/
H A Dmtk-memory-port.h12 #define MTK_M4U_TO_LARB(id) (((id) >> 5) & 0x1f)
13 #define MTK_M4U_TO_PORT(id) ((id) & 0x1f)
/u-boot/drivers/ata/
H A Dlibata.c12 u64 ata_id_n_sectors(u16 *id) argument
14 if (ata_id_has_lba(id)) {
15 if (ata_id_has_lba48(id))
16 return ata_id_u64(id, ATA_ID_LBA48_SECTORS);
18 return ata_id_u32(id, ATA_ID_LBA_SECTORS);
44 static void ata_id_string(const u16 *id, unsigned char *s, argument
50 c = id[ofs] >> 8;
54 c = id[ofs] & 0xff;
63 void ata_id_c_string(const u16 *id, unsigned char *s, argument
68 ata_id_string(id,
76 ata_dump_id(u16 *id) argument
[all...]
/u-boot/include/dt-bindings/clock/
H A Dat91.h17 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dat91.h17 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dat91.h17 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dat91.h17 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dat91.h17 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dat91.h17 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dat91.h17 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dat91.h17 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
/u-boot/arch/x86/include/asm/arch-coreboot/
H A Dtimestamp.h14 void timestamp_add(enum timestamp_id id, uint64_t ts_time);
15 void timestamp_add_now(enum timestamp_id id);
/u-boot/arch/arm/mach-at91/include/mach/
H A Datmel_sdhci.h10 int atmel_sdhci_init(void *regbase, u32 id);
/u-boot/arch/arm/include/asm/arch-tegra/
H A Dfuncmux.h22 * @param id Peripheral id
24 * Return: 0 if ok, -1 on error (e.g. incorrect id or config)
26 int funcmux_select(enum periph_id id, int config);
/u-boot/drivers/fpga/
H A Dfpga-uclass.c10 .id = UCLASS_FPGA,
/u-boot/drivers/pinctrl/tegra/
H A Dfuncmux-tegra210.c15 int funcmux_select(enum periph_id id, int config) argument
19 switch (id) {
30 debug("%s: invalid periph_id %d", __func__, id);
36 config, id);
/u-boot/arch/arm/mach-tegra/
H A Dpowergate.c24 static int tegra_powergate_set(enum tegra_powergate id, bool state) argument
26 u32 value, mask = state ? (1 << id) : 0, old_mask;
30 old_mask = value & (1 << id);
35 tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE);
41 if ((value & (1 << id)) == mask)
48 int tegra_powergate_power_on(enum tegra_powergate id) argument
50 return tegra_powergate_set(id, true);
53 int tegra_powergate_power_off(enum tegra_powergate id) argument
55 return tegra_powergate_set(id, false);
58 static int tegra_powergate_remove_clamping(enum tegra_powergate id) argument
79 tegra_powergate_sequence_power_up(enum tegra_powergate id, enum periph_id periph) argument
[all...]
/u-boot/arch/m68k/cpu/mcf532x/
H A Dcpu.c40 u16 id = 0; local
49 id = 53010;
52 id = 53012;
55 id = 53015;
58 id = 53011;
61 id = 53013;
66 id = 5329;
69 id = 5328;
72 id = 5327;
75 id
[all...]
/u-boot/arch/arm/mach-davinci/
H A Dpsc.c33 static void lpsc_transition(unsigned int id, unsigned int state) argument
38 if (id < DAVINCI_LPSC_PSC1_BASE) {
39 if (id >= PSC_PSC0_MODULE_ID_CNT)
42 mdstat = &psc_regs->psc0.mdstat[id];
43 mdctl = &psc_regs->psc0.mdctl[id];
45 id -= DAVINCI_LPSC_PSC1_BASE;
46 if (id >= PSC_PSC1_MODULE_ID_CNT)
49 mdstat = &psc_regs->psc1.mdstat[id];
50 mdctl = &psc_regs->psc1.mdctl[id];
70 void lpsc_on(unsigned int id) argument
75 lpsc_syncreset(unsigned int id) argument
80 lpsc_disable(unsigned int id) argument
[all...]
/u-boot/arch/arm/mach-nexell/include/mach/
H A Dsec_reg.h12 int write_sec_reg_by_id(void __iomem *reg, int val, int id);
13 int read_sec_reg_by_id(void __iomem *reg, int id);
/u-boot/drivers/memory/
H A Dmemory-uclass.c11 .id = UCLASS_MEMORY,
/u-boot/drivers/clk/at91/
H A Dclk-system.c28 u8 id; member in struct:clk_system
33 static inline int is_pck(int id) argument
35 return (id >= 8) && (id <= 15);
38 static inline bool clk_system_ready(void __iomem *base, int id) argument
44 return !!(status & (1 << id));
51 pmc_write(sys->base, AT91_PMC_SCER, 1 << sys->id);
53 if (!is_pck(sys->id))
56 while (!clk_system_ready(sys->base, sys->id)) {
57 debug("waiting for pck%u\n", sys->id);
79 at91_clk_register_system(void __iomem *base, const char *name, const char *parent_name, u8 id) argument
[all...]
/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsecure_reg_helper.h15 int socfpga_secure_reg_read32(u32 id, u32 *val);
16 int socfpga_secure_reg_write32(u32 id, u32 val);
17 int socfpga_secure_reg_update32(u32 id, u32 mask, u32 val);
/u-boot/include/
H A Dlibata.h422 * id tests
424 #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
425 #define ata_id_has_lba(id) ((id)[49] & (1 << 9))
426 #define ata_id_has_dma(id) ((id)[49] & (1 << 8))
427 #define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
428 #define ata_id_queue_depth(id) (((i
443 ata_id_has_fua(const u16 *id) argument
450 ata_id_has_flush(const u16 *id) argument
457 ata_id_has_flush_ext(const u16 *id) argument
464 ata_id_has_lba48(const u16 *id) argument
473 ata_id_hpa_enabled(const u16 *id) argument
487 ata_id_has_wcache(const u16 *id) argument
495 ata_id_has_pm(const u16 *id) argument
502 ata_id_rahead_enabled(const u16 *id) argument
509 ata_id_wcache_enabled(const u16 *id) argument
516 ata_id_major_version(const u16 *id) argument
529 ata_id_is_sata(const u16 *id) argument
534 ata_id_has_tpm(const u16 *id) argument
544 ata_id_has_dword_io(const u16 *id) argument
554 ata_id_current_chs_valid(const u16 *id) argument
566 ata_id_is_cfa(const u16 *id) argument
[all...]
/u-boot/drivers/mtd/nand/raw/
H A Dnand_amd.c33 if (chip->id.data[4] != 0x00 && chip->id.data[5] == 0x00 &&
34 chip->id.data[6] == 0x00 && chip->id.data[7] == 0x00 &&
37 mtd->erasesize <<= ((chip->id.data[3] & 0x03) << 1);

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