Searched refs:delay_between_burst (Results 1 - 3 of 3) sorted by relevance
| /u-boot/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_flow.h | 116 u32 delay_between_burst, u32 rd_mode, u32 cs_num,
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| H A D | ddr3_training_bist.c | 29 u32 delay_between_burst; local
49 delay_between_burst = (dir == OPER_WRITE) ? 2 : 0;
54 delay_between_burst,
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| H A D | ddr3_training_ip_engine.c | 488 u32 delay_between_burst; local
540 delay_between_burst = (direction == OPER_WRITE) ? 2 : 0;
546 delay_between_burst, rd_mode, effective_cs, STRESS_NONE,
769 u32 delay_between_burst, u32 rd_mode, u32 cs_num,
776 (tx_burst_size << 11) | (delay_between_burst << 15) |
766 ddr3_tip_configure_odpg(u32 dev_num, enum hws_access_type access_type, u32 if_id, enum hws_dir direction, u32 tx_phases, u32 tx_burst_size, u32 rx_phases, u32 delay_between_burst, u32 rd_mode, u32 cs_num, u32 addr_stress_jump, u32 single_pattern) argument
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