Searched refs:ZDMA_CH_CTRL0_MODE_WR_ONLY (Results 1 - 1 of 1) sorted by relevance

/u-boot/arch/arm/mach-zynqmp/
H A Decc_spl_init.c24 #define ZDMA_CH_CTRL0_MODE_WR_ONLY (u32)0x00000010U macro
98 ZDMA_CH_CTRL0_MODE_WR_ONLY);

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