Searched refs:SR (Results 1 - 3 of 3) sorted by relevance

/u-boot/drivers/clk/
H A Dclk-xlnx-clock-wizard.c21 #define SR 0x4 macro
79 ret = readl_poll_sleep_timeout(priv->base + SR, val, val & SR_LOCKED,
84 ret = readl_poll_sleep_timeout(priv->base + SR, val,
/u-boot/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7621.c49 #define SR BIT(0) macro
236 set = SR;
238 clr = SR;
/u-boot/drivers/mtd/nand/raw/
H A Datmel_nand.c1102 ecc_status = ecc_readl(ATMEL_BASE_ECC, SR);

Completed in 96 milliseconds