Searched refs:SPRN_L1CSR2 (Results 1 - 1 of 1) sorted by relevance
/u-boot/arch/powerpc/include/asm/ | ||
H A D | processor.h | 493 #define SPRN_L1CSR2 0x25e /* L1 Data Cache Control and Status Register 2 */ macro 731 #define L1CSR2 SPRN_L1CSR2 |
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