/u-boot/arch/sandbox/dts/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 180 #define SC_P_QSPI0B_SS0_B 171 /* LSIO.QSPI0B.SS0_B, LSIO.QSPI1A.SS0_B, LSIO.KPP0.ROW2, LSIO.GPIO3.IO23 */ macro 748 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0 749 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI1A_SS0_B SC_P_QSPI0B_SS0_B 1 750 #define SC_P_QSPI0B_SS0_B_LSIO_KPP0_ROW2 SC_P_QSPI0B_SS0_B 2 751 #define SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23 SC_P_QSPI0B_SS0_B 4
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H A D | pads-imx8qm.h | 204 #define SC_P_QSPI0B_SS0_B 195 /* LSIO.QSPI0B.SS0_B */ macro 761 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0
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/u-boot/arch/x86/dts/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 180 #define SC_P_QSPI0B_SS0_B 171 /* LSIO.QSPI0B.SS0_B, LSIO.QSPI1A.SS0_B, LSIO.KPP0.ROW2, LSIO.GPIO3.IO23 */ macro 748 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0 749 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI1A_SS0_B SC_P_QSPI0B_SS0_B 1 750 #define SC_P_QSPI0B_SS0_B_LSIO_KPP0_ROW2 SC_P_QSPI0B_SS0_B 2 751 #define SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23 SC_P_QSPI0B_SS0_B 4
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H A D | pads-imx8qm.h | 204 #define SC_P_QSPI0B_SS0_B 195 /* LSIO.QSPI0B.SS0_B */ macro 761 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0
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/u-boot/arch/xtensa/dts/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 180 #define SC_P_QSPI0B_SS0_B 171 /* LSIO.QSPI0B.SS0_B, LSIO.QSPI1A.SS0_B, LSIO.KPP0.ROW2, LSIO.GPIO3.IO23 */ macro 748 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0 749 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI1A_SS0_B SC_P_QSPI0B_SS0_B 1 750 #define SC_P_QSPI0B_SS0_B_LSIO_KPP0_ROW2 SC_P_QSPI0B_SS0_B 2 751 #define SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23 SC_P_QSPI0B_SS0_B 4
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H A D | pads-imx8qm.h | 204 #define SC_P_QSPI0B_SS0_B 195 /* LSIO.QSPI0B.SS0_B */ macro 761 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0
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/u-boot/arch/microblaze/dts/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 180 #define SC_P_QSPI0B_SS0_B 171 /* LSIO.QSPI0B.SS0_B, LSIO.QSPI1A.SS0_B, LSIO.KPP0.ROW2, LSIO.GPIO3.IO23 */ macro 748 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0 749 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI1A_SS0_B SC_P_QSPI0B_SS0_B 1 750 #define SC_P_QSPI0B_SS0_B_LSIO_KPP0_ROW2 SC_P_QSPI0B_SS0_B 2 751 #define SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23 SC_P_QSPI0B_SS0_B 4
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H A D | pads-imx8qm.h | 204 #define SC_P_QSPI0B_SS0_B 195 /* LSIO.QSPI0B.SS0_B */ macro 761 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0
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/u-boot/arch/mips/dts/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 180 #define SC_P_QSPI0B_SS0_B 171 /* LSIO.QSPI0B.SS0_B, LSIO.QSPI1A.SS0_B, LSIO.KPP0.ROW2, LSIO.GPIO3.IO23 */ macro 748 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0 749 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI1A_SS0_B SC_P_QSPI0B_SS0_B 1 750 #define SC_P_QSPI0B_SS0_B_LSIO_KPP0_ROW2 SC_P_QSPI0B_SS0_B 2 751 #define SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23 SC_P_QSPI0B_SS0_B 4
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H A D | pads-imx8qm.h | 204 #define SC_P_QSPI0B_SS0_B 195 /* LSIO.QSPI0B.SS0_B */ macro 761 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0
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/u-boot/arch/nios2/dts/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 180 #define SC_P_QSPI0B_SS0_B 171 /* LSIO.QSPI0B.SS0_B, LSIO.QSPI1A.SS0_B, LSIO.KPP0.ROW2, LSIO.GPIO3.IO23 */ macro 748 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0 749 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI1A_SS0_B SC_P_QSPI0B_SS0_B 1 750 #define SC_P_QSPI0B_SS0_B_LSIO_KPP0_ROW2 SC_P_QSPI0B_SS0_B 2 751 #define SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23 SC_P_QSPI0B_SS0_B 4
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H A D | pads-imx8qm.h | 204 #define SC_P_QSPI0B_SS0_B 195 /* LSIO.QSPI0B.SS0_B */ macro 761 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0
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/u-boot/arch/arm/dts/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 180 #define SC_P_QSPI0B_SS0_B 171 /* LSIO.QSPI0B.SS0_B, LSIO.QSPI1A.SS0_B, LSIO.KPP0.ROW2, LSIO.GPIO3.IO23 */ macro 748 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0 749 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI1A_SS0_B SC_P_QSPI0B_SS0_B 1 750 #define SC_P_QSPI0B_SS0_B_LSIO_KPP0_ROW2 SC_P_QSPI0B_SS0_B 2 751 #define SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23 SC_P_QSPI0B_SS0_B 4
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H A D | pads-imx8qm.h | 204 #define SC_P_QSPI0B_SS0_B 195 /* LSIO.QSPI0B.SS0_B */ macro 761 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0
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/u-boot/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 180 #define SC_P_QSPI0B_SS0_B 171 /* LSIO.QSPI0B.SS0_B, LSIO.QSPI1A.SS0_B, LSIO.KPP0.ROW2, LSIO.GPIO3.IO23 */ macro 748 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0 749 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI1A_SS0_B SC_P_QSPI0B_SS0_B 1 750 #define SC_P_QSPI0B_SS0_B_LSIO_KPP0_ROW2 SC_P_QSPI0B_SS0_B 2 751 #define SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23 SC_P_QSPI0B_SS0_B 4
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H A D | pads-imx8qm.h | 204 #define SC_P_QSPI0B_SS0_B 195 /* LSIO.QSPI0B.SS0_B */ macro 761 #define SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B SC_P_QSPI0B_SS0_B 0
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