Searched refs:SCLK_BUS0_PLL_B (Results 1 - 10 of 10) sorted by relevance

/u-boot/include/dt-bindings/clock/
H A Dexynos7420-clk.h29 #define SCLK_BUS0_PLL_B 16 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dexynos7420-clk.h29 #define SCLK_BUS0_PLL_B 16 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dexynos7420-clk.h29 #define SCLK_BUS0_PLL_B 16 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dexynos7420-clk.h29 #define SCLK_BUS0_PLL_B 16 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dexynos7420-clk.h29 #define SCLK_BUS0_PLL_B 16 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dexynos7420-clk.h29 #define SCLK_BUS0_PLL_B 16 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dexynos7420-clk.h29 #define SCLK_BUS0_PLL_B 16 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dexynos7420-clk.h29 #define SCLK_BUS0_PLL_B 16 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dexynos7-clk.h26 #define SCLK_BUS0_PLL_B 16 macro
/u-boot/drivers/clk/exynos/
H A Dclk-exynos7420.c97 case SCLK_BUS0_PLL_B:

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