Searched refs:RST_AHB1_NAND0 (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/sandbox/dts/include/dt-bindings/reset/
H A Dsun6i-a31-ccu.h58 #define RST_AHB1_NAND0 11 macro
/u-boot/arch/x86/dts/include/dt-bindings/reset/
H A Dsun6i-a31-ccu.h58 #define RST_AHB1_NAND0 11 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/reset/
H A Dsun6i-a31-ccu.h58 #define RST_AHB1_NAND0 11 macro
/u-boot/arch/mips/dts/include/dt-bindings/reset/
H A Dsun6i-a31-ccu.h58 #define RST_AHB1_NAND0 11 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/reset/
H A Dsun6i-a31-ccu.h58 #define RST_AHB1_NAND0 11 macro
/u-boot/arch/nios2/dts/include/dt-bindings/reset/
H A Dsun6i-a31-ccu.h58 #define RST_AHB1_NAND0 11 macro
/u-boot/arch/arm/dts/include/dt-bindings/reset/
H A Dsun6i-a31-ccu.h58 #define RST_AHB1_NAND0 11 macro
/u-boot/include/dt-bindings/reset/
H A Dsun6i-a31-ccu.h58 #define RST_AHB1_NAND0 11 macro
/u-boot/dts/upstream/include/dt-bindings/reset/
H A Dsun6i-a31-ccu.h58 #define RST_AHB1_NAND0 11 macro
/u-boot/drivers/clk/sunxi/
H A Dclk_a31.c72 [RST_AHB1_NAND0] = RESET(0x2c0, BIT(13)),

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