Searched refs:RISCV_MMODE_TIMERBASE (Results 1 - 6 of 6) sorted by relevance

/u-boot/include/configs/
H A Dstarfive-visionfive2.h11 #define RISCV_MMODE_TIMERBASE 0x2000000 macro
H A Dqemu-riscv.h13 #define RISCV_MMODE_TIMERBASE 0x2000000 macro
H A Dae350.h10 #define RISCV_MMODE_TIMERBASE 0xe6000000 macro
H A Dsifive-unleashed.h16 #define RISCV_MMODE_TIMERBASE 0x2000000 macro
/u-boot/drivers/timer/
H A Driscv_aclint_timer.c43 return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE,
61 ticks = readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE,
H A Dandes_plmt_timer.c41 return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));

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