Searched refs:REG_SRC_DPHY_SW_CTRL (Results 1 - 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-imx9/
H A Dddr.h34 #define REG_SRC_DPHY_SW_CTRL (SRC_DPHY_BASE_ADDR + 0x20) macro
/u-boot/drivers/ddr/imx/imx9/
H A Dddr_init.c29 clrbits_le32(REG_SRC_DPHY_SW_CTRL, BIT(0));
37 setbits_le32(REG_SRC_DPHY_SW_CTRL, BIT(0));
46 clrbits_le32(REG_SRC_DPHY_SW_CTRL, BIT(0));

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