Searched refs:REG_SRC_DPHY_SINGLE_RESET_SW_CTRL (Results 1 - 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-imx9/
H A Dddr.h35 #define REG_SRC_DPHY_SINGLE_RESET_SW_CTRL (SRC_DPHY_BASE_ADDR + 0x24) macro
/u-boot/drivers/ddr/imx/imx9/
H A Dddr_init.c31 clrbits_le32(REG_SRC_DPHY_SINGLE_RESET_SW_CTRL, BIT(2));
33 setbits_le32(REG_SRC_DPHY_SINGLE_RESET_SW_CTRL, BIT(0));
39 setbits_le32(REG_SRC_DPHY_SINGLE_RESET_SW_CTRL, BIT(2));
42 clrbits_le32(REG_SRC_DPHY_SINGLE_RESET_SW_CTRL, BIT(0));
48 clrbits_le32(REG_SRC_DPHY_SINGLE_RESET_SW_CTRL, BIT(2));

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