Searched refs:RCC_MP_APB1ENSETR (Results 1 - 4 of 4) sorted by relevance

/u-boot/board/st/stm32mp1/
H A Ddebug_uart.c12 #define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00) macro
21 setbits_le32(RCC_MP_APB1ENSETR, BIT(16));
/u-boot/drivers/clk/stm32/
H A Dclk-stm32mp13.c365 GATE_CFG(GATE_TIM2, RCC_MP_APB1ENSETR, 0, 1),
366 GATE_CFG(GATE_TIM3, RCC_MP_APB1ENSETR, 1, 1),
367 GATE_CFG(GATE_TIM4, RCC_MP_APB1ENSETR, 2, 1),
368 GATE_CFG(GATE_TIM5, RCC_MP_APB1ENSETR, 3, 1),
369 GATE_CFG(GATE_TIM6, RCC_MP_APB1ENSETR, 4, 1),
370 GATE_CFG(GATE_TIM7, RCC_MP_APB1ENSETR, 5, 1),
371 GATE_CFG(GATE_LPTIM1, RCC_MP_APB1ENSETR, 9, 1),
372 GATE_CFG(GATE_SPI2, RCC_MP_APB1ENSETR, 11, 1),
373 GATE_CFG(GATE_SPI3, RCC_MP_APB1ENSETR, 12, 1),
374 GATE_CFG(GATE_USART3, RCC_MP_APB1ENSETR, 1
[all...]
H A Dclk-stm32mp1.c120 #define RCC_MP_APB1ENSETR 0xA00 macro
531 STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 11, SPI2_K, _SPI23_SEL),
532 STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 12, SPI3_K, _SPI23_SEL),
533 STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 14, USART2_K, _UART24_SEL),
534 STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 15, USART3_K, _UART35_SEL),
535 STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 16, UART4_K, _UART24_SEL),
536 STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 17, UART5_K, _UART35_SEL),
537 STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 18, UART7_K, _UART78_SEL),
538 STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 19, UART8_K, _UART78_SEL),
539 STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 2
[all...]
H A Dstm32mp13_rcc.h124 #define RCC_MP_APB1ENSETR 0x700 macro

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