Searched refs:R8A77995_CLK_S1D2 (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dr8a77995-cpg-mssr.h18 #define R8A77995_CLK_S1D2 7 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dr8a77995-cpg-mssr.h18 #define R8A77995_CLK_S1D2 7 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dr8a77995-cpg-mssr.h18 #define R8A77995_CLK_S1D2 7 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dr8a77995-cpg-mssr.h18 #define R8A77995_CLK_S1D2 7 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dr8a77995-cpg-mssr.h18 #define R8A77995_CLK_S1D2 7 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dr8a77995-cpg-mssr.h18 #define R8A77995_CLK_S1D2 7 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dr8a77995-cpg-mssr.h18 #define R8A77995_CLK_S1D2 7 macro
/u-boot/include/dt-bindings/clock/
H A Dr8a77995-cpg-mssr.h18 #define R8A77995_CLK_S1D2 7 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dr8a77995-cpg-mssr.h18 #define R8A77995_CLK_S1D2 7 macro
/u-boot/drivers/clk/renesas/
H A Dr8a77995-cpg-mssr.c87 DEF_FIXED("s1d2", R8A77995_CLK_S1D2, CLK_S1, 2, 1),
149 DEF_MOD("intc-ap", 408, R8A77995_CLK_S1D2),
150 DEF_MOD("audmac0", 502, R8A77995_CLK_S1D2),
155 DEF_MOD("fcpvd1", 602, R8A77995_CLK_S1D2),
156 DEF_MOD("fcpvd0", 603, R8A77995_CLK_S1D2),
158 DEF_MOD("vspd1", 622, R8A77995_CLK_S1D2),
159 DEF_MOD("vspd0", 623, R8A77995_CLK_S1D2),
171 DEF_MOD("imr0", 823, R8A77995_CLK_S1D2),

Completed in 134 milliseconds