Searched refs:R8A7796_CLK_S0D2 (Results 1 - 10 of 10) sorted by relevance

/u-boot/drivers/clk/renesas/
H A Dr8a7796-cpg-mssr.c88 DEF_FIXED("s0d2", R8A7796_CLK_S0D2, CLK_S0, 2, 1),
187 DEF_MOD("fcpvd2", 601, R8A7796_CLK_S0D2),
188 DEF_MOD("fcpvd1", 602, R8A7796_CLK_S0D2),
189 DEF_MOD("fcpvd0", 603, R8A7796_CLK_S0D2),
193 DEF_MOD("fcpci0", 617, R8A7796_CLK_S0D2),
194 DEF_MOD("fcpcs", 619, R8A7796_CLK_S0D2),
195 DEF_MOD("vspd2", 621, R8A7796_CLK_S0D2),
196 DEF_MOD("vspd1", 622, R8A7796_CLK_S0D2),
197 DEF_MOD("vspd0", 623, R8A7796_CLK_S0D2),
214 DEF_MOD("vin7", 804, R8A7796_CLK_S0D2),
[all...]
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dr8a7796-cpg-mssr.h20 #define R8A7796_CLK_S0D2 9 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dr8a7796-cpg-mssr.h20 #define R8A7796_CLK_S0D2 9 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dr8a7796-cpg-mssr.h20 #define R8A7796_CLK_S0D2 9 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dr8a7796-cpg-mssr.h20 #define R8A7796_CLK_S0D2 9 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dr8a7796-cpg-mssr.h20 #define R8A7796_CLK_S0D2 9 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dr8a7796-cpg-mssr.h20 #define R8A7796_CLK_S0D2 9 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dr8a7796-cpg-mssr.h20 #define R8A7796_CLK_S0D2 9 macro
/u-boot/include/dt-bindings/clock/
H A Dr8a7796-cpg-mssr.h20 #define R8A7796_CLK_S0D2 9 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dr8a7796-cpg-mssr.h20 #define R8A7796_CLK_S0D2 9 macro

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