Searched refs:R8A77965_CLK_S0D2 (Results 1 - 10 of 10) sorted by relevance
| /u-boot/drivers/clk/renesas/ |
| H A D | r8a77965-cpg-mssr.c | 84 DEF_FIXED("s0d2", R8A77965_CLK_S0D2, CLK_S0, 2, 1),
187 DEF_MOD("fcpvd1", 602, R8A77965_CLK_S0D2),
188 DEF_MOD("fcpvd0", 603, R8A77965_CLK_S0D2),
192 DEF_MOD("fcpcs", 619, R8A77965_CLK_S0D2),
193 DEF_MOD("vspd1", 622, R8A77965_CLK_S0D2),
194 DEF_MOD("vspd0", 623, R8A77965_CLK_S0D2),
213 DEF_MOD("vin7", 804, R8A77965_CLK_S0D2),
214 DEF_MOD("vin6", 805, R8A77965_CLK_S0D2),
215 DEF_MOD("vin5", 806, R8A77965_CLK_S0D2),
216 DEF_MOD("vin4", 807, R8A77965_CLK_S0D2),
[all...] |
| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 19 #define R8A77965_CLK_S0D2 8 macro
|
| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 19 #define R8A77965_CLK_S0D2 8 macro
|
| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 19 #define R8A77965_CLK_S0D2 8 macro
|
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 19 #define R8A77965_CLK_S0D2 8 macro
|
| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 19 #define R8A77965_CLK_S0D2 8 macro
|
| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 19 #define R8A77965_CLK_S0D2 8 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 19 #define R8A77965_CLK_S0D2 8 macro
|
| /u-boot/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 19 #define R8A77965_CLK_S0D2 8 macro
|
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 19 #define R8A77965_CLK_S0D2 8 macro
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