Searched refs:R8A77965_CLK_S0D1 (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h18 #define R8A77965_CLK_S0D1 7 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h18 #define R8A77965_CLK_S0D1 7 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h18 #define R8A77965_CLK_S0D1 7 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h18 #define R8A77965_CLK_S0D1 7 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h18 #define R8A77965_CLK_S0D1 7 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h18 #define R8A77965_CLK_S0D1 7 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h18 #define R8A77965_CLK_S0D1 7 macro
/u-boot/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h18 #define R8A77965_CLK_S0D1 7 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dr8a77965-cpg-mssr.h18 #define R8A77965_CLK_S0D1 7 macro
/u-boot/drivers/clk/renesas/
H A Dr8a77965-cpg-mssr.c83 DEF_FIXED("s0d1", R8A77965_CLK_S0D1, CLK_S0, 1, 1),
129 DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1),
189 DEF_MOD("fcpvb0", 607, R8A77965_CLK_S0D1),
190 DEF_MOD("fcpvi0", 611, R8A77965_CLK_S0D1),
191 DEF_MOD("fcpf0", 615, R8A77965_CLK_S0D1),
195 DEF_MOD("vspb", 626, R8A77965_CLK_S0D1),
196 DEF_MOD("vspi0", 631, R8A77965_CLK_S0D1),

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