Searched refs:R8A774C0_CLK_S3D4 (Results 1 - 10 of 10) sorted by relevance

/u-boot/drivers/clk/renesas/
H A Dr8a774c0-cpg-mssr.c103 DEF_FIXED("s3d4", R8A774C0_CLK_S3D4, CLK_S3, 4, 1),
200 DEF_MOD("gpio6", 906, R8A774C0_CLK_S3D4),
201 DEF_MOD("gpio5", 907, R8A774C0_CLK_S3D4),
202 DEF_MOD("gpio4", 908, R8A774C0_CLK_S3D4),
203 DEF_MOD("gpio3", 909, R8A774C0_CLK_S3D4),
204 DEF_MOD("gpio2", 910, R8A774C0_CLK_S3D4),
205 DEF_MOD("gpio1", 911, R8A774C0_CLK_S3D4),
206 DEF_MOD("gpio0", 912, R8A774C0_CLK_S3D4),
208 DEF_MOD("can-if1", 915, R8A774C0_CLK_S3D4),
209 DEF_MOD("can-if0", 916, R8A774C0_CLK_S3D4),
[all...]
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h29 #define R8A774C0_CLK_S3D4 18 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h29 #define R8A774C0_CLK_S3D4 18 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h29 #define R8A774C0_CLK_S3D4 18 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h29 #define R8A774C0_CLK_S3D4 18 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h29 #define R8A774C0_CLK_S3D4 18 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h29 #define R8A774C0_CLK_S3D4 18 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h29 #define R8A774C0_CLK_S3D4 18 macro
/u-boot/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h29 #define R8A774C0_CLK_S3D4 18 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h29 #define R8A774C0_CLK_S3D4 18 macro

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