Searched refs:PMU_REG_LPSR_1P0_CLR_RSVD1_SHIFT (Results 1 - 1 of 1) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx7/
H A Dcrm_regs.h1418 #define PMU_REG_LPSR_1P0_CLR_RSVD1_SHIFT 24 macro
1419 #define PMU_REG_LPSR_1P0_CLR_RSVD1(x) (((uint32_t)(((uint32_t)(x))<<PMU_REG_LPSR_1P0_CLR_RSVD1_SHIFT))&PMU_REG_LPSR_1P0_CLR_RSVD1_MASK)

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