Searched refs:PMU_REG_1P0A_CLR_ENABLE_ILIMIT_MASK (Results 1 - 1 of 1) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx7/
H A Dcrm_regs.h967 #define PMU_REG_1P0A_CLR_ENABLE_ILIMIT_MASK 0x4u macro

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