Searched refs:NUM_RX_DESC (Results 1 - 8 of 8) sorted by relevance

/u-boot/drivers/net/
H A Dmt7628-eth.c123 #define NUM_RX_DESC 256 macro
144 u8 *rx_buf[NUM_RX_DESC];
471 idx = (idx + 1) % NUM_RX_DESC;
487 for (i = 0; i < NUM_RX_DESC; i++) {
514 writel(NUM_RX_DESC, base + RX_MAX_CNT0);
520 writel(NUM_RX_DESC - 1, base + RX_CALC_IDX0);
590 sizeof(*priv->rx_ring) * NUM_RX_DESC));
592 for (i = 0; i < NUM_RX_DESC; i++)
H A Drtl8169.c89 #define NUM_RX_DESC CONFIG_SYS_RX_ETH_BUFFER macro
91 #define NUM_RX_DESC 4 /* Number of Rx descriptor registers */ macro
335 DEFINE_ALIGN_BUFFER(u8, rxb, NUM_RX_DESC * RX_BUF_SIZE, RTL8169_ALIGN);
347 unsigned char *RxBufferRing[NUM_RX_DESC]; /* Index of Rx Buffer array */
553 if (cur_rx == NUM_RX_DESC - 1)
569 cur_rx = (cur_rx + 1) % NUM_RX_DESC;
782 memset(tpc->RxDescArray, 0x0, NUM_RX_DESC * sizeof(struct RxDesc));
788 for (i = 0; i < NUM_RX_DESC; i++) {
789 if (i == (NUM_RX_DESC - 1))
871 for (i = 0; i < NUM_RX_DESC;
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H A Deepro100.c179 #define NUM_RX_DESC PKTBUFSRX macro
198 struct eepro100_rxfd rx_ring[NUM_RX_DESC];
350 for (i = 0; i < NUM_RX_DESC; i++) {
352 rx_ring[i].control = (i == NUM_RX_DESC - 1) ?
357 NUM_RX_DESC]));
364 (sizeof(*rx_ring) * NUM_RX_DESC));
711 rx_prev = (priv->rx_next + NUM_RX_DESC - 1) % NUM_RX_DESC;
718 priv->rx_next = (priv->rx_next + 1) % NUM_RX_DESC;
H A Dmt7620-eth.c268 #define NUM_RX_DESC 128 macro
813 memset(priv->rx_ring, 0, NUM_RX_DESC * sizeof(struct pdma_rx_desc));
814 memset(priv->pkt_buf, 0, (NUM_TX_DESC + NUM_RX_DESC) * PKTSIZE_ALIGN);
829 for (i = 0; i < NUM_RX_DESC; i++) {
840 pdma_write(priv, RX_MAX_CNT0, NUM_RX_DESC);
841 pdma_write(priv, RX_CALC_IDX0, NUM_RX_DESC - 1);
952 priv->rx_dma_owner_idx0 = (priv->rx_dma_owner_idx0 + 1) % NUM_RX_DESC;
976 NUM_RX_DESC * sizeof(struct pdma_rx_desc));
983 (NUM_TX_DESC + NUM_RX_DESC) * PKTSIZE_ALIGN);
H A Ddc2114x.c78 #define NUM_RX_DESC PKTBUFSRX macro
94 struct de4x5_desc rx_ring[NUM_RX_DESC] __aligned(32);
404 for (i = 0; i < NUM_RX_DESC; i++) {
419 priv->rx_ring_size = NUM_RX_DESC;
H A Dsh_eth.c159 port_info->rx_desc_base + NUM_RX_DESC)
251 u32 alloc_desc_size = NUM_RX_DESC * sizeof(struct rx_desc_s);
279 memalign(RX_BUF_ALIGNE_SIZE, NUM_RX_DESC * MAX_BUF_SIZE);
291 i < NUM_RX_DESC; cur_rx_desc++, rx_buf += MAX_BUF_SIZE, i++) {
301 invalidate_cache(port_info->rx_buf_alloc, NUM_RX_DESC * MAX_BUF_SIZE);
H A Dmtk_eth.c34 #define NUM_RX_DESC 24 macro
36 #define RX_TOTAL_BUF_SIZE (NUM_RX_DESC * PKTSIZE_ALIGN)
1563 memset(priv->rx_ring_noc, 0, NUM_RX_DESC * priv->soc->rxd_size);
1589 for (i = 0; i < NUM_RX_DESC; i++) {
1610 mtk_pdma_write(priv, RX_MAX_CNT_REG(0), NUM_RX_DESC);
1611 mtk_pdma_write(priv, RX_CRX_IDX_REG(0), NUM_RX_DESC - 1);
1801 priv->rx_dma_owner_idx0 = (priv->rx_dma_owner_idx0 + 1) % NUM_RX_DESC;
1829 noncached_alloc(priv->soc->rxd_size * NUM_RX_DESC,
H A Dsh_eth.h61 #define NUM_RX_DESC 8 macro

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