Searched refs:MX6_PAD_SNVS_TAMPER5__GPIO5_IO05 (Results 1 - 2 of 2) sorted by relevance
/u-boot/arch/arm/include/asm/arch-mx6/ |
H A D | mx6ul_pins.h | 24 MX6_PAD_SNVS_TAMPER5__GPIO5_IO05 = IOMUX_PAD(0x02BC, 0x0030, 5, 0x0000, 0, 0), enumerator in enum:__anon56
|
H A D | mx6ull_pins.h | 24 MX6_PAD_SNVS_TAMPER5__GPIO5_IO05 = IOMUX_PAD(0x0060, 0x001C, IOMUX_CONFIG_LPSR | 5, 0x0000, 0, 0), enumerator in enum:__anon1
|
Completed in 63 milliseconds