Searched refs:MX6_PAD_SNVS_TAMPER2__GPIO5_IO02 (Results 1 - 2 of 2) sorted by relevance
/u-boot/arch/arm/include/asm/arch-mx6/ |
H A D | mx6ul_pins.h | 21 MX6_PAD_SNVS_TAMPER2__GPIO5_IO02 = IOMUX_PAD(0x02B0, 0x0024, 5, 0x0000, 0, 0), enumerator in enum:__anon56
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H A D | mx6ull_pins.h | 21 MX6_PAD_SNVS_TAMPER2__GPIO5_IO02 = IOMUX_PAD(0x0054, 0x0010, IOMUX_CONFIG_LPSR | 5, 0x0000, 0, 0), enumerator in enum:__anon1
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