Searched refs:MVPP2_BM_PHY_RLS_REG (Results 1 - 1 of 1) sorted by relevance
/u-boot/drivers/net/ | ||
H A D | mvpp2.c | 300 #define MVPP2_BM_PHY_RLS_REG(pool) (0x6480 + ((pool) * 4)) macro 2750 mvpp2_write(port->priv, MVPP2_BM_PHY_RLS_REG(pool), buf_dma_addr); |
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