Searched refs:MSR_IA32_MISC_ENABLE (Results 1 - 6 of 6) sorted by relevance

/u-boot/arch/x86/cpu/
H A Dturbo.c68 msr = msr_read(MSR_IA32_MISC_ENABLE);
96 msr = msr_read(MSR_IA32_MISC_ENABLE);
98 msr_write(MSR_IA32_MISC_ENABLE, msr);
/u-boot/arch/x86/cpu/intel_common/
H A Dcpu.c193 msr = msr_read(MSR_IA32_MISC_ENABLE);
212 msr = msr_read(MSR_IA32_MISC_ENABLE);
217 msr_write(MSR_IA32_MISC_ENABLE, msr);
224 msr = msr_read(MSR_IA32_MISC_ENABLE);
229 msr_write(MSR_IA32_MISC_ENABLE, msr);
/u-boot/arch/x86/cpu/baytrail/
H A Dcpu.c75 msr = msr_read(MSR_IA32_MISC_ENABLE);
77 msr_write(MSR_IA32_MISC_ENABLE, msr);
/u-boot/arch/x86/cpu/apollolake/
H A Dcpu.c128 msr_clrsetbits_64(MSR_IA32_MISC_ENABLE, MISC_ENABLE_MWAIT, 0);
/u-boot/arch/x86/cpu/broadwell/
H A Dcpu_full.c476 msr = msr_read(MSR_IA32_MISC_ENABLE);
480 msr_write(MSR_IA32_MISC_ENABLE, msr);
/u-boot/arch/x86/include/asm/
H A Dmsr-index.h115 #define MSR_IA32_MISC_ENABLE 0x000001a0 macro

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