Searched refs:MCTL_MR0 (Results 1 - 6 of 6) sorted by relevance

/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun8i_a83t.h199 #define MCTL_MR0 0x1c70 /* CL=11, WR=12 */ macro
H A Ddram_sun8i_a33.h177 #define MCTL_MR0 0x1c70 /* CL=11, WR=12 */ macro
H A Ddram_sun6i.h351 #define MCTL_MR0 0x1a50 macro
/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a33.c134 writel(MCTL_MR0, &mctl_ctl->mr0);
H A Ddram_sun6i.c123 writel(MCTL_MR0, &mctl_phy->mr0);
H A Ddram_sun8i_a83t.c135 writel(MCTL_MR0, &mctl_ctl->mr0);

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