Searched refs:L1CSR0_DCLFR (Results 1 - 3 of 3) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
H A Drelease.S120 lis r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
121 ori r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
H A Dstart.S849 lis r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
850 ori r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h484 #define L1CSR0_DCLFR 0x00000100 /* D-Cache Lock Flash Reset */ macro

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