Searched refs:L1CSR0_CPE (Results 1 - 3 of 3) sorted by relevance
| /u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | release.S | 128 lis r3,(L1CSR0_CPE|L1CSR0_DCE)@h
129 ori r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
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| H A D | start.S | 857 lis r3,(L1CSR0_CPE|L1CSR0_DCE)@h
858 ori r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
1458 ori r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@l
1459 oris r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@h
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| /u-boot/arch/powerpc/include/asm/ |
| H A D | processor.h | 482 #define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */ macro
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