Searched refs:HID0 (Results 1 - 3 of 3) sorted by relevance
| /u-boot/arch/powerpc/cpu/mpc83xx/ |
| H A D | start.S | 527 /* HID0 also contains cache control */
534 mtspr HID0, r3
539 mtspr HID0, r3
720 * HID0 are in the low half word.
725 mfspr r3, HID0
731 mtspr HID0, r4 /* sets enable and invalidate, clears lock */
733 mtspr HID0, r3 /* clears invalidate */
738 mfspr r3, HID0
743 mtspr HID0, r3 /* clears invalidate, enable and lock */
748 mfspr r3, HID0
[all...] |
| /u-boot/arch/powerpc/include/asm/ |
| H A D | processor.h | 621 #define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */ macro
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| /u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | start.S | 404 mtspr HID0,r0
1879 /* save off HID0 and set DCFA */
1900 /* restore HID0 */
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