Searched refs:FSL_SRDSCR0_DPP_1V2 (Results 1 - 1 of 1) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dserdes.c19 #define FSL_SRDSCR0_DPP_1V2 0x00008800 macro
55 tmp &= ~FSL_SRDSCR0_DPP_1V2;

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