Searched refs:FSL_DMA_MR_BWC_DIS (Results 1 - 2 of 2) sorted by relevance

/u-boot/arch/powerpc/include/asm/
H A Dfsl_dma.h69 #define FSL_DMA_MR_BWC_DIS 0x0f000000 /* Bandwidth/pause ctl disable */ macro
/u-boot/drivers/dma/
H A Dfsl_dma.c22 #define FSL_DMA_MR_DEFAULT (FSL_DMA_MR_BWC_DIS | FSL_DMA_MR_CTM_DIRECT)

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