Searched refs:DENALI_CTL_77_DATA (Results 1 - 4 of 4) sorted by relevance

/u-boot/include/renesas/
H A Dis43tr16256a_125k_CTL.h121 #define DENALI_CTL_77_DATA 0x00000000 // RDLVL_END_DELAY_0:RD:16:16:=0x0000 RDLVL_BEGIN_DELAY_0:RD:0:16:=0x0000 macro
H A Djedec_ddr3_2g_x16_1333h_500_cl8.h102 #define DENALI_CTL_77_DATA 0x00000000 macro
/u-boot/drivers/ram/rockchip/
H A Dsdram-rk3399-lpddr4-800.inc162 0x00030000, /* DENALI_CTL_77_DATA */
H A Dsdram-rk3399-lpddr4-400.inc162 0x00030000, /* DENALI_CTL_77_DATA */

Completed in 47 milliseconds