Searched refs:DENALI_CTL_282_DATA (Results 1 - 4 of 4) sorted by relevance

/u-boot/include/renesas/
H A Dis43tr16256a_125k_CTL.h326 #define DENALI_CTL_282_DATA 0x00030f0f // AXI2_RANGE_PROT_BITS_0:RW:16:2:=0x03 AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_15:RW:8:4:=0x0f AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_15:RW:0:4:=0x0f macro
H A Djedec_ddr3_2g_x16_1333h_500_cl8.h307 #define DENALI_CTL_282_DATA 0x00030f0f macro
/u-boot/drivers/ram/rockchip/
H A Dsdram-rk3399-lpddr4-800.inc367 0x00000c20, /* DENALI_CTL_282_DATA */
H A Dsdram-rk3399-lpddr4-400.inc367 0x00000c20, /* DENALI_CTL_282_DATA */

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