Searched refs:DDR_PLL_DITHER2_VAL (Results 1 - 1 of 1) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
H A Dclk.c172 #define DDR_PLL_DITHER2_VAL DDR_PLL_DITHER2_NFRAC_MAX_SET(0x0) macro
280 writel(DDR_PLL_DITHER2_VAL, pll_regs + QCA956X_PLL_DDR_DIT2_FRAC_REG);

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