Searched refs:DDR_PLL_CONFIG_PLLPWD_SET (Results 1 - 1 of 1) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
H A Dclk.c78 #define DDR_PLL_CONFIG_PLLPWD_SET(x) \ macro
263 ddr_pll_set(DDR_PLL_CONFIG_PLLPWD_MASK, DDR_PLL_CONFIG_PLLPWD_SET(1));
288 ddr_pll_set(DDR_PLL_CONFIG_PLLPWD_MASK, DDR_PLL_CONFIG_PLLPWD_SET(0));

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