Searched refs:DDR2_MODE_DLL_VAL (Results 1 - 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar933x/
H A Dddr.c97 #define DDR2_MODE_DLL_VAL 0x100 macro
143 writel(DDR2_MODE_DLL_VAL, regs + AR71XX_DDR_REG_MODE);
/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c184 #define DDR2_MODE_DLL_VAL 0x143 macro
357 writel(DDR2_MODE_DLL_VAL, regs + AR71XX_DDR_REG_MODE);

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