Searched refs:DDR2_CONF_VAL (Results 1 - 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar933x/
H A Dddr.c90 #define DDR2_CONF_VAL (DDR2_CONF_TWL(2) | DDR2_CONF_ODT | \ macro
120 writel(DDR2_CONF_VAL, regs + AR933X_DDR_REG_DDR2_CONFIG);
/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c175 #define DDR2_CONF_VAL (DDR2_CONF_TWL(5) | \ macro
333 writel(DDR2_CONF_VAL, regs + QCA953X_DDR_REG_DDR2_CONFIG);

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