Searched refs:DBCR0 (Results 1 - 3 of 3) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu.c311 * Initiate hard reset in debug control register DBCR0
318 val = mfspr(DBCR0);
320 mtspr(DBCR0,val);
H A Dstart.S435 lis r0,CFG_SYS_INIT_DBCR@h /* DBCR0[IDM] must be set */
437 mtspr DBCR0,r0
/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h610 #define DBCR0 SPRN_DBCR0 /* Debug Control Register 0 */ macro

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