Searched refs:CLK_TOP_VPLL_DPIX (Results 1 - 13 of 13) sorted by relevance

/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt8135-clk.h66 #define CLK_TOP_VPLL_DPIX 55 macro
H A Dmt8167-clk.h25 #define CLK_TOP_VPLL_DPIX (CLK_TOP_NR_CLK + 1) macro
H A Dmediatek,mt8365-clk.h13 #define CLK_TOP_VPLL_DPIX 3 macro
H A Dmt2712-clk.h119 #define CLK_TOP_VPLL_DPIX 88 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h13 #define CLK_TOP_VPLL_DPIX 3 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h13 #define CLK_TOP_VPLL_DPIX 3 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h13 #define CLK_TOP_VPLL_DPIX 3 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h13 #define CLK_TOP_VPLL_DPIX 3 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h13 #define CLK_TOP_VPLL_DPIX 3 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h13 #define CLK_TOP_VPLL_DPIX 3 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h13 #define CLK_TOP_VPLL_DPIX 3 macro
/u-boot/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h13 #define CLK_TOP_VPLL_DPIX 3 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8365.c71 FIXED_CLK(CLK_TOP_VPLL_DPIX, CLK_TOP_CLK26M, 75000000),
542 GATE_TOP1(CLK_TOP_VPLL_DPIX_EN, CLK_TOP_VPLL_DPIX, 21),

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