Searched refs:CLK_TOP_VENCPLL (Results 1 - 13 of 13) sorted by relevance

/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h87 #define CLK_TOP_VENCPLL 76 macro
H A Dmt8173-clk.h89 #define CLK_TOP_VENCPLL 79 macro
H A Dmt2701-clk.h83 #define CLK_TOP_VENCPLL 73 macro
H A Dmt2712-clk.h99 #define CLK_TOP_VENCPLL 68 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c86 FIXED_CLK(CLK_TOP_VENCPLL, CLK_XTAL, 295.75 * MHZ),
210 CLK_TOP_VENCPLL,
233 CLK_TOP_VENCPLL,
398 CLK_TOP_VENCPLL,
414 CLK_TOP_VENCPLL,
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h14 #define CLK_TOP_VENCPLL 2 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h14 #define CLK_TOP_VENCPLL 2 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h14 #define CLK_TOP_VENCPLL 2 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h14 #define CLK_TOP_VENCPLL 2 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h14 #define CLK_TOP_VENCPLL 2 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h14 #define CLK_TOP_VENCPLL 2 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h14 #define CLK_TOP_VENCPLL 2 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h14 #define CLK_TOP_VENCPLL 2 macro

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