Searched refs:CLK_TOP_UNIVPLL_48M_EN (Results 1 - 20 of 20) sorted by relevance
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 121 #define CLK_TOP_UNIVPLL_48M_EN 5 macro
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| H A D | mediatek,mt8365-clk.h | 141 #define CLK_TOP_UNIVPLL_48M_EN 131 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 121 #define CLK_TOP_UNIVPLL_48M_EN 5 macro
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| H A D | mediatek,mt8365-clk.h | 141 #define CLK_TOP_UNIVPLL_48M_EN 131 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 121 #define CLK_TOP_UNIVPLL_48M_EN 5 macro
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| H A D | mediatek,mt8365-clk.h | 141 #define CLK_TOP_UNIVPLL_48M_EN 131 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 121 #define CLK_TOP_UNIVPLL_48M_EN 5 macro
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| H A D | mediatek,mt8365-clk.h | 141 #define CLK_TOP_UNIVPLL_48M_EN 131 macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 121 #define CLK_TOP_UNIVPLL_48M_EN 5 macro
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| H A D | mediatek,mt8365-clk.h | 141 #define CLK_TOP_UNIVPLL_48M_EN 131 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 121 #define CLK_TOP_UNIVPLL_48M_EN 5 macro
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| H A D | mediatek,mt8365-clk.h | 141 #define CLK_TOP_UNIVPLL_48M_EN 131 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 121 #define CLK_TOP_UNIVPLL_48M_EN 5 macro
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| H A D | mediatek,mt8365-clk.h | 141 #define CLK_TOP_UNIVPLL_48M_EN 131 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt8512-clk.h | 121 #define CLK_TOP_UNIVPLL_48M_EN 5 macro
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| H A D | mediatek,mt8365-clk.h | 141 #define CLK_TOP_UNIVPLL_48M_EN 131 macro
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| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 122 #define CLK_TOP_UNIVPLL_48M_EN 87 macro
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| H A D | mediatek,mt8365-clk.h | 141 #define CLK_TOP_UNIVPLL_48M_EN 131 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 540 GATE_TOP1(CLK_TOP_UNIVPLL_48M_EN, CLK_TOP_USB20_192M_D4, 9),
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| H A D | clk-mt8512.c | 634 GATE_TOP1(CLK_TOP_UNIVPLL_48M_EN, CLK_TOP_USB20_192M_D4_T, 9),
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