| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 51 #define CLK_TOP_UNIVPLL2_D8 40 macro
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| H A D | mt7629-clk.h | 56 #define CLK_TOP_UNIVPLL2_D8 46 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 102 PLL_FACTOR(CLK_TOP_UNIVPLL2_D8, "univpll2_d8", CLK_APMIXED_UNIVPLL, 1, 24),
188 CLK_TOP_UNIVPLL2_D8,
197 CLK_TOP_UNIVPLL2_D8
204 CLK_TOP_UNIVPLL2_D8
244 CLK_TOP_UNIVPLL2_D8
392 CLK_TOP_UNIVPLL2_D8,
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| H A D | clk-mt8512.c | 97 FACTOR1(CLK_TOP_UNIVPLL2_D8, CLK_TOP_UNIVPLL, 1, 24),
153 CLK_TOP_UNIVPLL2_D8
193 CLK_TOP_UNIVPLL2_D8
209 CLK_TOP_UNIVPLL2_D8,
324 CLK_TOP_UNIVPLL2_D8,
434 CLK_TOP_UNIVPLL2_D8
439 CLK_TOP_UNIVPLL2_D8
445 CLK_TOP_UNIVPLL2_D8
|
| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 59 #define CLK_TOP_UNIVPLL2_D8 46 macro
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| H A D | mt8512-clk.h | 33 #define CLK_TOP_UNIVPLL2_D8 22 macro
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| H A D | mt7622-clk.h | 50 #define CLK_TOP_UNIVPLL2_D8 38 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 59 #define CLK_TOP_UNIVPLL2_D8 46 macro
|
| H A D | mt8512-clk.h | 33 #define CLK_TOP_UNIVPLL2_D8 22 macro
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| H A D | mt7622-clk.h | 50 #define CLK_TOP_UNIVPLL2_D8 38 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 59 #define CLK_TOP_UNIVPLL2_D8 46 macro
|
| H A D | mt8512-clk.h | 33 #define CLK_TOP_UNIVPLL2_D8 22 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 59 #define CLK_TOP_UNIVPLL2_D8 46 macro
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| H A D | mt8512-clk.h | 33 #define CLK_TOP_UNIVPLL2_D8 22 macro
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| H A D | mt7622-clk.h | 50 #define CLK_TOP_UNIVPLL2_D8 38 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 59 #define CLK_TOP_UNIVPLL2_D8 46 macro
|
| H A D | mt8512-clk.h | 33 #define CLK_TOP_UNIVPLL2_D8 22 macro
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| H A D | mt7622-clk.h | 50 #define CLK_TOP_UNIVPLL2_D8 38 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 59 #define CLK_TOP_UNIVPLL2_D8 46 macro
|
| H A D | mt8512-clk.h | 33 #define CLK_TOP_UNIVPLL2_D8 22 macro
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| H A D | mt7622-clk.h | 50 #define CLK_TOP_UNIVPLL2_D8 38 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 59 #define CLK_TOP_UNIVPLL2_D8 46 macro
|
| H A D | mt8512-clk.h | 33 #define CLK_TOP_UNIVPLL2_D8 22 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 59 #define CLK_TOP_UNIVPLL2_D8 46 macro
|
| H A D | mt8512-clk.h | 33 #define CLK_TOP_UNIVPLL2_D8 22 macro
|