| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7629.c | 122 FACTOR1(CLK_TOP_UNIVPLL2_D4, CLK_TOP_UNIVPLL, 1, 12),
186 CLK_TOP_UNIVPLL2_D4
207 CLK_TOP_UNIVPLL2_D4,
221 CLK_TOP_UNIVPLL2_D4
235 CLK_TOP_UNIVPLL2_D4,
246 CLK_TOP_UNIVPLL2_D4,
262 CLK_TOP_UNIVPLL2_D4,
273 CLK_TOP_UNIVPLL2_D4,
300 CLK_TOP_UNIVPLL2_D4,
308 CLK_TOP_UNIVPLL2_D4
[all...] |
| H A D | clk-mt7622.c | 120 FACTOR1(CLK_TOP_UNIVPLL2_D4, CLK_TOP_UNIVPLL, 1, 12),
135 FACTOR1(CLK_TOP_TO_USB3_REF, CLK_TOP_UNIVPLL2_D4, 1, 4),
173 CLK_TOP_UNIVPLL2_D4
194 CLK_TOP_UNIVPLL2_D4,
207 CLK_TOP_UNIVPLL2_D4
221 CLK_TOP_UNIVPLL2_D4,
232 CLK_TOP_UNIVPLL2_D4,
302 CLK_TOP_UNIVPLL2_D4
487 GATE_PCIE(CLK_SATA_PM_EN, CLK_TOP_UNIVPLL2_D4, 30),
|
| H A D | clk-mt8512.c | 96 FACTOR1(CLK_TOP_UNIVPLL2_D4, CLK_TOP_UNIVPLL, 1, 12),
163 CLK_TOP_UNIVPLL2_D4,
174 CLK_TOP_UNIVPLL2_D4,
248 CLK_TOP_UNIVPLL2_D4,
272 CLK_TOP_UNIVPLL2_D4,
295 CLK_TOP_UNIVPLL2_D4,
329 CLK_TOP_UNIVPLL2_D4,
391 CLK_TOP_UNIVPLL2_D4
433 CLK_TOP_UNIVPLL2_D4,
|
| H A D | clk-mt8365.c | 101 PLL_FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", CLK_APMIXED_UNIVPLL, 1, 12),
203 CLK_TOP_UNIVPLL2_D4,
291 CLK_TOP_UNIVPLL2_D4
304 CLK_TOP_UNIVPLL2_D4,
374 CLK_TOP_UNIVPLL2_D4,
|
| H A D | clk-mt7623.c | 132 FACTOR1(CLK_TOP_UNIVPLL2_D4, CLK_TOP_UNIVPLL_D3, 1, 4),
221 CLK_TOP_UNIVPLL2_D4,
268 CLK_TOP_UNIVPLL2_D4,
284 CLK_TOP_UNIVPLL2_D4,
293 CLK_TOP_UNIVPLL2_D4
386 CLK_TOP_UNIVPLL2_D4
427 CLK_TOP_UNIVPLL2_D4,
|
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 49 #define CLK_TOP_UNIVPLL2_D4 38 macro
|
| H A D | mt7629-clk.h | 55 #define CLK_TOP_UNIVPLL2_D4 45 macro
|
| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL2_D4 45 macro
|
| H A D | mt8512-clk.h | 32 #define CLK_TOP_UNIVPLL2_D4 21 macro
|
| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL2_D4 45 macro
|
| H A D | mt8512-clk.h | 32 #define CLK_TOP_UNIVPLL2_D4 21 macro
|
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL2_D4 45 macro
|
| H A D | mt8512-clk.h | 32 #define CLK_TOP_UNIVPLL2_D4 21 macro
|
| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL2_D4 45 macro
|
| H A D | mt8512-clk.h | 32 #define CLK_TOP_UNIVPLL2_D4 21 macro
|
| H A D | mt7622-clk.h | 49 #define CLK_TOP_UNIVPLL2_D4 37 macro
|
| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL2_D4 45 macro
|
| H A D | mt8512-clk.h | 32 #define CLK_TOP_UNIVPLL2_D4 21 macro
|
| H A D | mt7622-clk.h | 49 #define CLK_TOP_UNIVPLL2_D4 37 macro
|
| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL2_D4 45 macro
|
| H A D | mt8512-clk.h | 32 #define CLK_TOP_UNIVPLL2_D4 21 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL2_D4 45 macro
|
| H A D | mt8512-clk.h | 32 #define CLK_TOP_UNIVPLL2_D4 21 macro
|
| /u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL2_D4 45 macro
|
| H A D | mt8512-clk.h | 32 #define CLK_TOP_UNIVPLL2_D4 21 macro
|