Searched refs:CLK_TOP_UNIVPLL2_D32 (Results 1 - 21 of 21) sorted by relevance

/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt6765-clk.h64 #define CLK_TOP_UNIVPLL2_D32 29 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D32 29 macro
H A Dmt2701-clk.h43 #define CLK_TOP_UNIVPLL2_D32 33 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h60 #define CLK_TOP_UNIVPLL2_D32 47 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D32 29 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h60 #define CLK_TOP_UNIVPLL2_D32 47 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D32 29 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h60 #define CLK_TOP_UNIVPLL2_D32 47 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D32 29 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h60 #define CLK_TOP_UNIVPLL2_D32 47 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D32 29 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h60 #define CLK_TOP_UNIVPLL2_D32 47 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D32 29 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h60 #define CLK_TOP_UNIVPLL2_D32 47 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D32 29 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt7623-clk.h60 #define CLK_TOP_UNIVPLL2_D32 47 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D32 29 macro
/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h60 #define CLK_TOP_UNIVPLL2_D32 47 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D32 29 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8365.c103 PLL_FACTOR(CLK_TOP_UNIVPLL2_D32, "univpll2_d32", CLK_APMIXED_UNIVPLL, 1, 96),
190 CLK_TOP_UNIVPLL2_D32,
H A Dclk-mt7623.c135 FACTOR1(CLK_TOP_UNIVPLL2_D32, CLK_TOP_UNIVPLL_D3, 1, 32),
491 CLK_TOP_UNIVPLL2_D32

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