/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt8365.c | 100 PLL_FACTOR(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", CLK_APMIXED_UNIVPLL, 1, 6), 165 CLK_TOP_UNIVPLL2_D2, 202 CLK_TOP_UNIVPLL2_D2, 231 CLK_TOP_UNIVPLL2_D2, 239 CLK_TOP_UNIVPLL2_D2, 331 CLK_TOP_UNIVPLL2_D2 338 CLK_TOP_UNIVPLL2_D2, 378 CLK_TOP_UNIVPLL2_D2, 384 CLK_TOP_UNIVPLL2_D2, 401 CLK_TOP_UNIVPLL2_D2, [all...] |
H A D | clk-mt7629.c | 121 FACTOR1(CLK_TOP_UNIVPLL2_D2, CLK_TOP_UNIVPLL, 1, 6), 158 CLK_TOP_UNIVPLL2_D2, 265 CLK_TOP_UNIVPLL2_D2 276 CLK_TOP_UNIVPLL2_D2 307 CLK_TOP_UNIVPLL2_D2, 354 CLK_TOP_UNIVPLL2_D2,
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H A D | clk-mt8512.c | 95 FACTOR1(CLK_TOP_UNIVPLL2_D2, CLK_TOP_UNIVPLL, 1, 6), 158 CLK_TOP_UNIVPLL2_D2, 172 CLK_TOP_UNIVPLL2_D2, 188 CLK_TOP_UNIVPLL2_D2, 202 CLK_TOP_UNIVPLL2_D2, 249 CLK_TOP_UNIVPLL2_D2, 346 CLK_TOP_UNIVPLL2_D2 351 CLK_TOP_UNIVPLL2_D2, 376 CLK_TOP_UNIVPLL2_D2,
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H A D | clk-mt7623.c | 131 FACTOR1(CLK_TOP_UNIVPLL2_D2, CLK_TOP_UNIVPLL_D3, 1, 2), 193 CLK_TOP_UNIVPLL2_D2, 215 CLK_TOP_UNIVPLL2_D2, 232 CLK_TOP_UNIVPLL2_D2, 252 CLK_TOP_UNIVPLL2_D2, 403 CLK_TOP_UNIVPLL2_D2, 428 CLK_TOP_UNIVPLL2_D2,
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/u-boot/dts/upstream/include/dt-bindings/clock/ |
H A D | mt8135-clk.h | 48 #define CLK_TOP_UNIVPLL2_D2 37 macro
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H A D | mt7629-clk.h | 54 #define CLK_TOP_UNIVPLL2_D2 44 macro
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/u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 57 #define CLK_TOP_UNIVPLL2_D2 44 macro
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H A D | mt8512-clk.h | 31 #define CLK_TOP_UNIVPLL2_D2 20 macro
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/u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 57 #define CLK_TOP_UNIVPLL2_D2 44 macro
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H A D | mt8512-clk.h | 31 #define CLK_TOP_UNIVPLL2_D2 20 macro
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H A D | mt7622-clk.h | 48 #define CLK_TOP_UNIVPLL2_D2 36 macro
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/u-boot/arch/arm/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 57 #define CLK_TOP_UNIVPLL2_D2 44 macro
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H A D | mt8512-clk.h | 31 #define CLK_TOP_UNIVPLL2_D2 20 macro
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/u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 57 #define CLK_TOP_UNIVPLL2_D2 44 macro
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H A D | mt8512-clk.h | 31 #define CLK_TOP_UNIVPLL2_D2 20 macro
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H A D | mt7622-clk.h | 48 #define CLK_TOP_UNIVPLL2_D2 36 macro
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/u-boot/arch/mips/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 57 #define CLK_TOP_UNIVPLL2_D2 44 macro
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H A D | mt8512-clk.h | 31 #define CLK_TOP_UNIVPLL2_D2 20 macro
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H A D | mt7622-clk.h | 48 #define CLK_TOP_UNIVPLL2_D2 36 macro
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/u-boot/arch/x86/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 57 #define CLK_TOP_UNIVPLL2_D2 44 macro
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H A D | mt8512-clk.h | 31 #define CLK_TOP_UNIVPLL2_D2 20 macro
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/u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 57 #define CLK_TOP_UNIVPLL2_D2 44 macro
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H A D | mt8512-clk.h | 31 #define CLK_TOP_UNIVPLL2_D2 20 macro
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/u-boot/include/dt-bindings/clock/ |
H A D | mt7629-clk.h | 57 #define CLK_TOP_UNIVPLL2_D2 44 macro
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H A D | mt8512-clk.h | 31 #define CLK_TOP_UNIVPLL2_D2 20 macro
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