| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 28 #define CLK_TOP_TXCLK_SRC_PRE 15 macro
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| H A D | mt7622-clk.h | 26 #define CLK_TOP_TXCLK_SRC_PRE 14 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 28 #define CLK_TOP_TXCLK_SRC_PRE 15 macro
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| H A D | mt7622-clk.h | 26 #define CLK_TOP_TXCLK_SRC_PRE 14 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 28 #define CLK_TOP_TXCLK_SRC_PRE 15 macro
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| H A D | mt7622-clk.h | 26 #define CLK_TOP_TXCLK_SRC_PRE 14 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 28 #define CLK_TOP_TXCLK_SRC_PRE 15 macro
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| H A D | mt7622-clk.h | 26 #define CLK_TOP_TXCLK_SRC_PRE 14 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 28 #define CLK_TOP_TXCLK_SRC_PRE 15 macro
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| H A D | mt7622-clk.h | 26 #define CLK_TOP_TXCLK_SRC_PRE 14 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 28 #define CLK_TOP_TXCLK_SRC_PRE 15 macro
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| H A D | mt7622-clk.h | 26 #define CLK_TOP_TXCLK_SRC_PRE 14 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 28 #define CLK_TOP_TXCLK_SRC_PRE 15 macro
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| H A D | mt7622-clk.h | 26 #define CLK_TOP_TXCLK_SRC_PRE 14 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 28 #define CLK_TOP_TXCLK_SRC_PRE 15 macro
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| H A D | mt7622-clk.h | 26 #define CLK_TOP_TXCLK_SRC_PRE 14 macro
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| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 25 #define CLK_TOP_TXCLK_SRC_PRE 15 macro
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| H A D | mt7622-clk.h | 26 #define CLK_TOP_TXCLK_SRC_PRE 14 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 97 FACTOR1(CLK_TOP_TXCLK_SRC_PRE, CLK_TOP_SGMIIPLL_D2, 1, 1),
506 GATE_ETH(CLK_ETH_GP2_EN, CLK_TOP_TXCLK_SRC_PRE, 7),
507 GATE_ETH(CLK_ETH_GP1_EN, CLK_TOP_TXCLK_SRC_PRE, 8),
508 GATE_ETH(CLK_ETH_GP0_EN, CLK_TOP_TXCLK_SRC_PRE, 9),
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| H A D | clk-mt7629.c | 92 FACTOR1(CLK_TOP_TXCLK_SRC_PRE, CLK_TOP_SGMIIPLL_D2, 1, 1),
516 GATE_ETH1(CLK_ETH_GP2_EN, CLK_TOP_TXCLK_SRC_PRE, 7),
517 GATE_ETH1(CLK_ETH_GP1_EN, CLK_TOP_TXCLK_SRC_PRE, 8),
518 GATE_ETH1(CLK_ETH_GP0_EN, CLK_TOP_TXCLK_SRC_PRE, 9),
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