| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8365.c | 93 PLL_FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", CLK_APMIXED_MAINPLL, 1, 14),
164 CLK_TOP_SYSPLL4_D2,
222 CLK_TOP_SYSPLL4_D2
257 CLK_TOP_SYSPLL4_D2
373 CLK_TOP_SYSPLL4_D2,
395 CLK_TOP_SYSPLL4_D2
|
| H A D | clk-mt7622.c | 110 FACTOR0(CLK_TOP_SYSPLL4_D2, CLK_APMIXED_MAINPLL, 1, 14),
193 CLK_TOP_SYSPLL4_D2,
220 CLK_TOP_SYSPLL4_D2,
231 CLK_TOP_SYSPLL4_D2,
260 CLK_TOP_SYSPLL4_D2,
|
| H A D | clk-mt7629.c | 113 FACTOR0(CLK_TOP_SYSPLL4_D2, CLK_APMIXED_MAINPLL, 1, 14),
205 CLK_TOP_SYSPLL4_D2,
234 CLK_TOP_SYSPLL4_D2,
245 CLK_TOP_SYSPLL4_D2,
289 CLK_TOP_SYSPLL4_D2,
|
| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt8512-clk.h | 24 #define CLK_TOP_SYSPLL4_D2 13 macro
|
| H A D | mt7622-clk.h | 39 #define CLK_TOP_SYSPLL4_D2 27 macro
|
| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt8512-clk.h | 24 #define CLK_TOP_SYSPLL4_D2 13 macro
|
| H A D | mt7622-clk.h | 39 #define CLK_TOP_SYSPLL4_D2 27 macro
|
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt8512-clk.h | 24 #define CLK_TOP_SYSPLL4_D2 13 macro
|
| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt8512-clk.h | 24 #define CLK_TOP_SYSPLL4_D2 13 macro
|
| H A D | mt7622-clk.h | 39 #define CLK_TOP_SYSPLL4_D2 27 macro
|
| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt8512-clk.h | 24 #define CLK_TOP_SYSPLL4_D2 13 macro
|
| H A D | mt7622-clk.h | 39 #define CLK_TOP_SYSPLL4_D2 27 macro
|
| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt8512-clk.h | 24 #define CLK_TOP_SYSPLL4_D2 13 macro
|
| H A D | mt7622-clk.h | 39 #define CLK_TOP_SYSPLL4_D2 27 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt8512-clk.h | 24 #define CLK_TOP_SYSPLL4_D2 13 macro
|
| /u-boot/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 49 #define CLK_TOP_SYSPLL4_D2 36 macro
|
| H A D | mt8512-clk.h | 24 #define CLK_TOP_SYSPLL4_D2 13 macro
|
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt7629-clk.h | 46 #define CLK_TOP_SYSPLL4_D2 36 macro
|